1. Field of the Invention
The present invention relates to a rewritable nonvolatile semiconductor memory device, more particularly relates to a nonvolatile semiconductor memory device which can substantively improve the memory retention, the number of rewrites, and the yield of a nonvolatile memory having a small window.
2. Description of the Related Art
In a nonvolatile semiconductor memory device, use has been made of a differential amplifier to read the data of the transistor constituting the selected memory cell. In the differential amplifier, the potential signal data or current signal data (hereinafter also referred to generically as the "signal data") from the selected memory cell is compared with the reference potential or reference current (hereinafter also referred to generically as the "reference data") to determine if the signal data is "0" or "1". For example, when the signal data is smaller than the reference data, it is decided that the signal data is the data "0", and in the reverse case, it is decided that it is the data "1".
In one example of the method of preparation of the reference data, a reference cell having the same circuit configuration as the memory cell is sometimes used.
However, in a conventional nonvolatile semiconductor memory device, as shown in FIG. 1, a threshold value voltage Vth0 of the memory cell in which the data "0" (off at the time of reading) is stored sometimes becomes low along with the elapse of time (abscissa of graph, logt) due to the deterioration of the rewriting characteristic of the transistor, the deterioration of retention of the memory, manufacturing variations, etc. In this case, there is a concern that it will become lower than the gate voltage Vr at the time of reading of the data and a malfunction will occur. Note that, in FIG. 1, V.sub.th1 indicates the change of the voltage of the threshold value of the memory cell in which the data "1" (on at the time of reading) is stored.
Examining this state for the current from the memory cell, the result becomes as shown in FIG. 2. A current i.sub.0 read from the memory cell in which the data "0" is stored increases along with the elapse of time. Note that, the current i.sub.1 read from the memory cell in which the data "1" is stored is substantially constant regardless of the elapse of time in the case of this example. This is because, where the transistor constituting the memory cell is a transistor having a floating gate, electrons are not injected into the floating gate of the memory cell in which the data "1" is stored.
On the other hand, as the reference cell for preparing the reference data, conventionally a transistor which becomes ON at the time of reading (in which the data "1" is stored) is used and is set so that the reference current i.sub.rp at the time of reading becomes the predetermined rate of i.sub.1, for example, about 1/4, and therefore even if i.sub.1 changes along with the elapse of time, the reference current i.sub.rp changes by the constant rate of i.sub.1, and therefore at the time of the detection of the data "1", a malfunction is avoided. On the other hand, when the current i.sub.0 read from the memory cell in which the data "0" is stored starts to change and then exceeds the reference current i.sub.rp at a certain point of time, there is a danger of a malfunction.
In recent years, along with the reduction of voltages, the difference between the data "1" and the data "0" at the time of reading (difference between i.sub.1 and i.sub.0 or difference between V.sub.th1 and V.sub.th0) has become smaller (window is small). In such a memory, in particular, improvement of the memory retention, the number of rewrites, and the yield has been desired.